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MSS
2005
IEEE
62views Hardware» more  MSS 2005»
14 years 2 months ago
Predictive Reduction of Power and Latency (PuRPLe)
Increasing efforts have been aimed towards the management of power as a critical system resource, and the disk can consume approximately a third of the power required for a typica...
Matthew Craven, Ahmed Amer
SIGARCH
2008
94views more  SIGARCH 2008»
13 years 8 months ago
Parallelization, performance analysis, and algorithm consideration of Hough transform on chip multiprocessors
This paper presents a parallelization framework for emerging applications on the future chip multiprocessors (CMPs). With the continuing prevalence of CMP and the number of on-die...
Wenlong Li, Yen-Kuang Chen
INTERNET
2007
182views more  INTERNET 2007»
13 years 8 months ago
Analysis of Caching and Replication Strategies for Web Applications
Replication and caching mechanisms are often employed to enhance the performance of Web applications. In this article, we present a qualitative and quantitative analysis of state-...
Swaminathan Sivasubramanian, Guillaume Pierre, Maa...
MICRO
2011
IEEE
193views Hardware» more  MICRO 2011»
13 years 3 days ago
Voltage Noise in Production Processors
Abstract—Parameter variations have become a dominant challenge in microprocessor design. Voltage variation is especially daunting because it happens so rapidly. We measure and ch...
Vijay Janapa Reddi, Svilen Kanev, Wonyoung Kim, Si...
WWW
2005
ACM
14 years 9 months ago
A multi-threaded PIPELINED Web server architecture for SMP/SoC machines
Design of high performance Web servers has become a recent research thrust to meet the increasing demand of networkbased services. In this paper, we propose a new Web server archi...
Gyu Sang Choi, Jin-Ha Kim, Deniz Ersoz, Chita R. D...