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» X-architecture placement based on effective wire models
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ISPD
2006
ACM
158views Hardware» more  ISPD 2006»
14 years 1 months ago
Effective linear programming based placement methods
Linear programming (LP) based methods are attractive for solving the placement problem because of their ability to model Half-Perimeter Wirelength (HPWL) and timing. However, it h...
Sherief Reda, Amit Chowdhary
TCAD
2008
133views more  TCAD 2008»
13 years 7 months ago
Metal-Density-Driven Placement for CMP Variation and Routability
In this paper, we propose the first metal-density driven placement algorithm to reduce CMP variation and achieve higher routability. Based on an analytical placement framework, we...
Tung-Chieh Chen, Minsik Cho, David Z. Pan, Yao-Wen...
ASPDAC
2004
ACM
119views Hardware» more  ASPDAC 2004»
14 years 1 months ago
A fast congestion estimator for routing with bounded detours
Congestion estimation is an important issue for the success of the VLSI layout. Fast congestion estimation provides an efficient means to adjust the placement and wire planning. A...
Lerong Cheng, Xiaoyu Song, Guowu Yang, Zhiwei Tang
VLSISP
2008
108views more  VLSISP 2008»
13 years 7 months ago
Interconnect Driver Design for Long Wires in Field-Programmable Gate Arrays
Each new semiconductor technology node brings smaller, faster transistors and smaller, slower wires. In particular, long interconnect wires in modern FPGAs now require rebuffering ...
Edmund Lee, Guy Lemieux, Shahriar Mirabbasi
ISPD
2010
ACM
217views Hardware» more  ISPD 2010»
14 years 2 months ago
ITOP: integrating timing optimization within placement
Timing-driven placement is a critical step in nanometerscale physical synthesis. To improve design timing on a global scale, net-weight based global timing-driven placement is a c...
Natarajan Viswanathan, Gi-Joon Nam, Jarrod A. Roy,...