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ARCS
2009
Springer
14 years 2 months ago
Improving Memory Subsystem Performance Using ViVA: Virtual Vector Architecture
The disparity between microprocessor clock frequencies and memory latency is a primary reason why many demanding applications run well below peak achievable performance. Software c...
Joseph Gebis, Leonid Oliker, John Shalf, Samuel Wi...
ANSOFT
2002
94views more  ANSOFT 2002»
13 years 7 months ago
Testing Processes of Web Applications
Abstract. Current practice in Web application development is based on the skills of the individual programmers and often does not apply the principles of software engineering. The ...
Filippo Ricca, Paolo Tonella
EUROSYS
2010
ACM
14 years 1 months ago
PUSH: A Dataflow Shell
The deluge of huge data sets such as those provided by sensor networks, online transactions, and the web provide exciting opportunities for data analysis. The scale of the data ...
Noah Evans, Eric Van Hensbergen
CGO
2008
IEEE
14 years 2 months ago
Spice: speculative parallel iteration chunk execution
The recent trend in the processor industry of packing multiple processor cores in a chip has increased the importance of automatic techniques for extracting thread level paralleli...
Easwaran Raman, Neil Vachharajani, Ram Rangan, Dav...
IWOMP
2007
Springer
14 years 1 months ago
Supporting OpenMP on Cell
The Cell processor is a heterogeneous multi-core processor with one Power Processing Engine (PPE) core and eight Synergistic Processing Engine (SPE) cores. Each SPE has a directly...
Kevin O'Brien, Kathryn M. O'Brien, Zehra Sura, Ton...