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» XTR Implementation on Reconfigurable Hardware
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FCCM
2004
IEEE
118views VLSI» more  FCCM 2004»
14 years 1 months ago
Virtual Memory Window for a Portable Reconfigurable Cryptography Coprocessor
Reconfigurable System-on-Chip (SoC) platforms that incorporate hard-core processors surrounded by large amounts of FPGA are today commodities: the reconfigurable logic is often us...
Miljan Vuletic, Laura Pozzi, Paolo Ienne
IPPS
2006
IEEE
14 years 3 months ago
On-chip and on-line self-reconfigurable adaptable platform: the non-uniform cellular automata case
In spite of the high parallelism exhibited by cellular automata architectures, most implementations are usually run in software. For increasing execution parallelism, hardware imp...
Andres Upegui, Eduardo Sanchez
FPGA
2004
ACM
158views FPGA» more  FPGA 2004»
14 years 3 months ago
A novel coarse-grain reconfigurable data-path for accelerating DSP kernels
In this paper, an efficient implementation of a high performance coarse-grain reconfigurable data-path on a mixed-granularity reconfigurable platform is presented. It consists of ...
Michalis D. Galanis, George Theodoridis, Spyros Tr...
ERSA
2003
147views Hardware» more  ERSA 2003»
13 years 11 months ago
Towards Run-Time Re-Configurable Techniques for Real-Time Embedded Applications
Many embedded applications can benefit from the flexible custom computing opportunities that FPGA technology offers. The Run-Time Reconfiguration (RTR) of the FPGA as an applicati...
Timothy F. Oliver, Douglas L. Maskell
ERSA
2006
128views Hardware» more  ERSA 2006»
13 years 11 months ago
Reconfigurable Turbo/Viterbi Channel Decoder in the Coarse-Grained Montium Architecture
Mobile wireless communication systems become multi-mode systems. These future mobile systems employ multiple wireless communication standards, which are different by means of algor...
Gerard K. Rauwerda, Gerard J. M. Smit, Casper R. W...