1000 search results - page 40 / 200 » Yield-Aware Cache Architectures |
MICRO
1997
IEEE
13 years 12 months ago
1997
IEEE
Modern architectural trends in instruction-level parallelism (ILP) are to increase the computational power of microprocessors significantly. As a result, the demands on memory ha...
MICRO
1994
IEEE
13 years 12 months ago
1994
IEEE
Multiple issue of instructions occurs in superscalar and VLIW machines. This paper investigates a third type of machine design, which combines the advantages of code compatibility...
EDBT
2010
ACM
13 years 11 months ago
2010
ACM
Suffix trees are indexing structures that enhance the performance of numerous string processing algorithms. In this paper, we propose cache-conscious suffix tree construction algo...
OSDI
1994
ACM
13 years 9 months ago
1994
ACM
In a distributed storage system, client caches managed on the basis of small granularity objects can provide better memory utilization then page-based caches. However, object serv...
HPCA
2011
IEEE
12 years 11 months ago
2011
IEEE
Traditional architectural designs are normally focused on CPUs and have been often decoupled from I/O considerations. They are inefficient for high-speed network processing with a...