1000 search results - page 45 / 200 » Yield-Aware Cache Architectures |
TABLEAUX
2000
Springer
13 years 11 months ago
2000
Springer
Abstract. This paper presents the results of applying RACE, a description logic system for ALCNHR+ , to modal logic SAT problems. Some aspects of the RACE architecture are discusse...
ECRTS
2006
IEEE
14 years 1 months ago
2006
IEEE
Cache memories have been extensively used to bridge the gap between high speed processors and relatively slower main memories. However, they are sources of predictability problems...
RTSS
2003
IEEE
14 years 1 months ago
2003
IEEE
Data caches are essential in modern processors, bridging the widening gap between main memory and processor speeds. However, they yield very complex performance models, which make...
VLDB
1999
ACM
14 years 20 hour ago
1999
ACM
Data intensive applications today usually run in either a clientserver or a middleware environment. In either case, they must efficiently handle both database queries, which proc...
ISCA
1997
IEEE
13 years 12 months ago
1997
IEEE
Improvements in main memory speeds have not kept pace with increasing processor clock frequency and improved exploitation of instruction-level parallelism. Consequently, the gap b...