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ARITH
2005
IEEE
14 years 1 months ago
Low Latency Pipelined Circular CORDIC
The pipelined CORDIC with linear approximation to rotation has been proposed to achieve reductions in delay, power and area; however, the schemes for rotation (multiplication) and...
Elisardo Antelo, Julio Villalba
ARITH
2005
IEEE
14 years 1 months ago
Data Dependent Power Use in Multipliers
Recent research has demonstrated the vulnerability of certain smart card architectures to power and electromagnetic analysis when multiplier operations are insufficiently shielde...
Colin D. Walter, David Samyde
ARITH
2005
IEEE
14 years 1 months ago
High-Radix Implementation of IEEE Floating-Point Addition
We are proposing a micro-architecture for highperformance IEEE floating-point addition that is based on a (non-redundant)high-radix representation of the floatingpoint operands....
Peter-Michael Seidel
ARITH
2005
IEEE
14 years 1 months ago
Arithmetic Operations in the Polynomial Modular Number System
We propose a new number representation and arithmetic for the elements of the ring of integers modulo p. The socalled Polynomial Modular Number System (PMNS) allows for fast polyn...
Jean-Claude Bajard, Laurent Imbert, Thomas Plantar...
ARITH
2005
IEEE
14 years 1 months ago
An Improved Unified Scalable Radix-2 Montgomery Multiplier
This paper describes an improved version of the Tenca-Koç unified scalable radix-2 Montgomery multiplier with half the latency for small and moderate precision operands and half ...
David Harris, Ram Krishnamurthy, Mark Anders, Sanu...