This paper considers the testability implications of low power design methodologies. Low power and high testability are shown to be highly contrasting requirements, and an optimiz...
Silvia Chiusano, Fulvio Corno, Paolo Prinetto, Mau...
Testing circuits which do not include a global reset signal requires either complex ATPG algorithms based on 9- or even 256-valued algebras, or some suitable method to generate in...
Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo,...