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CDES
2006
13 years 9 months ago
2006
We survey a set of flip-flops designed for low power and high performance. We highlight the basic features of these flip-flops and evaluate them based on timing characteristics, po...
CDES
2006
13 years 9 months ago
2006
- The need for faster circuits in smaller area with lower power dissipation has made it a common practice to use the domino CMOS in high performance integrated circuits. However th...
CDES
2006
13 years 9 months ago
2006
- With the intention of reduce significantly the energy that wastes away when having a read or write access to the register file, since the technique Zero Detect diminishes the tra...
CDES
2006
13 years 9 months ago
2006
A neural network approach is presented for modeling and characterization of on-chip copper spiral inductors. The approach involves the creation of neural network models to map 3D ...
CDES
2006
13 years 9 months ago
2006
- Most of the direct-cover Boolean minimization techniques use a four step cyclic algorithm. First, the algorithm chooses an On-minterm; second, it generates the set of prime impli...