Processor cycle time continues to decrease faster than main memory access times, placing higher demands on cache memory hierarchy performance. To meet these demands, conventional ...
Alvin R. Lebeck, David R. Raymond, Chia-Lin Yang, ...
Current high-end parallel systems achieve low-latency, highbandwidth network communication through the use of aggressive design techniques and expensive mechanical and electrical ...
This paper presents a technique, adaptive replication, for automatically eliminating synchronization bottlenecks in multithreaded programs that perform atomic operations on object...
This paper proposes a novel way to use virtual memorymapped communication (VMMC) to reduce the failover time on clusters. With the VMMC model, applications’ virtual address spac...
The primary focus of this project is to design and implement a parallel framework for an unstructured mesh generator based on the advancing front method (AFM). In particular, we t...