We present ECC FIFO, a mechanism enabling two-tiered last-level cache error protection using an arbitrarily strong tier-2 code without increasing on-chip storage. Instead of addin...
Abstract. The reality of multi-core hardware has made concurrent programs pervasive. Unfortunately, writing correct concurrent programs is difficult. Atomicity violation, which is ...
Qichang Chen, Liqiang Wang, Zijiang Yang, Scott D....
Thread escape analysis, which determines whether and when a variable becomes shared by multiple threads, is a foundation for many other program analyses. Most existing escape anal...
—This paper proposes a new preprocessing scheme for rate-one quasi-orthogonal space-time block code (QO-STBC), which requires no channel state information at the transmitter. We ...
A post-processor is an integral part of any OCR system. This paper proposes a method for detection and correction of errors in recognition results of handwritten and machine print...