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IPPS
1998
IEEE
14 years 1 months ago
Pin-Down Cache: A Virtual Memory Management Technique for Zero-Copy Communication
The overhead of copying data through the central processor by a message passing protocol limits data transfer bandwidth. If the network interface directly transfers the user'...
Hiroshi Tezuka, Francis O'Carroll, Atsushi Hori, Y...
SPAA
1998
ACM
14 years 1 months ago
Lamport Clocks: Verifying a Directory Cache-Coherence Protocol
Modern shared-memory multiprocessors use complex memory system implementations that include a variety of non-trivial and interacting optimizations. More time is spent in verifying...
Manoj Plakal, Daniel J. Sorin, Anne Condon, Mark D...
ICS
1998
Tsinghua U.
14 years 1 months ago
Load Execution Latency Reduction
In order to achieve high performance, contemporary microprocessors must effectively process the four major instruction types: ALU, branch, load, and store instructions. This paper...
Bryan Black, Brian Mueller, Stephanie Postal, Ryan...
ETRA
2006
ACM
101views Biometrics» more  ETRA 2006»
14 years 3 months ago
Gaze-contingent temporal filtering of video
We describe an algorithm for manipulating the temporal resolution of a video in real time, contingent upon the viewer’s direction of gaze. The purpose of this work is to study t...
Martin Böhme, Michael Dorr, Thomas Martinetz,...
FCCM
1998
IEEE
107views VLSI» more  FCCM 1998»
14 years 1 months ago
Frequency-Domain Sonar Processing in FPGAs and DSPs
Over the past year we have been exploring the use of FPGA-based custom computing machines for several sonar beamforming applications, including time-domain beamforming[1], frequen...
Paul Graham, Brent E. Nelson