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CSREAESA
2006
13 years 9 months ago
Power Optimization of Interconnection Networks for Transport Triggered Architecture
Transport triggered architecture (TTA) has been shown to provide an efficient way to design application specific instruction set processors. However, the interconnection network of...
Xue-mi Zhao, Zhiying Wang
CSREAESA
2003
13 years 9 months ago
Coarse-Grained DRAM Power Management
− This paper presents an efficient system level power saving method for DRAM with multiple power modes. The proposed method is based on the power aware scheduling algorithm that ...
Jin Hwan Park, Sarah Wu, Baback A. Izadi
CSREAESA
2003
13 years 9 months ago
Worst Case Execution Time Analysis for Petri Net Models of Embedded Systems
We present an approach for Worst-Case Execution Time (WCET) Analysis of embedded system software, that is generated from Petri net specifications. The presented approach is part ...
Friedhelm Stappert, Carsten Rust
CSREAESA
2009
13 years 8 months ago
Application of Embedded Systems in Low Earth Orbit for Measurement of Ionospheric Anomalies
: Space is a hazardous environment for both man and machine and to explore such a terrain a rugged, yet easily implementable, platform is needed. Low-cost, low-power embedded syste...
George J. Starr, J. M. Wersinger, Richard Chapman,...
CSREAESA
2007
13 years 9 months ago
IT Security Protection at Field Level of Industrial Automation Systems
—Current industrial automation systems are virtually unprotected against attacks on IT security at field level, especially if an attacker is able to connect physically to field...
Felix Gutbrodt