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DDECS
2006
IEEE
95views Hardware» more  DDECS 2006»
14 years 1 months ago
Parallel Memory Architecture for Arbitrary Stride Accesses
—Parallel memory modules can be used to increase memory bandwidth and feed a processor with only necessary data. Arbitrary stride access capability with interleaved memories is d...
Eero Aho, Jarno Vanne, Timo D. Hämäl&aum...
DDECS
2006
IEEE
79views Hardware» more  DDECS 2006»
14 years 1 months ago
Multiple-Vector Column-Matching BIST Design Method
- Extension of a BIST design algorithm is proposed in this paper. The method is based on a synthesis of a combinational block - the decoder, transforming pseudo-random code words i...
Petr Fiser, Hana Kubatova
DDECS
2006
IEEE
101views Hardware» more  DDECS 2006»
14 years 1 months ago
Embedded Built-In-Test Detection Circuit for Radio Frequency Systems and Circuits
: An embedded rectifier-based Built-In-Test (BIT) detection circuit for the RF integrated circuits is proposed in this work, and charge pump rectifier is adopted to transform the R...
Guoyan Zhang, Ronan Farrell
DDECS
2006
IEEE
94views Hardware» more  DDECS 2006»
14 years 1 months ago
A System for Transforming an ANSI C Code with OpenMP Directives into a SystemC Description
Abstract— In this paper, we describe a system for transforming a code given in ANSI C into an equivalent SystemC description. In order to synthesize parallel C codes into hardwar...
Piotr Dziurzanski, W. Bielecki, Konrad Trifunovic,...
DDECS
2006
IEEE
108views Hardware» more  DDECS 2006»
14 years 1 months ago
Impact of Shared Instruction Memory on Performance of FPGA-based MP-SoC Video Encoder
—The impact of shared instruction memory on performance is measured and analyzed for an FPGAbased Multiprocessor System-on-Chip (MP-SoC) with an MPEG-4 video encoding application...
Ari Kulmala, Erno Salminen, Olli Lehtoranta, Timo ...