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ISVLSI
2006
IEEE
150views VLSI» more  ISVLSI 2006»
14 years 1 months ago
Design and Analysis of a Low Power VLIW DSP Core
Power consumption has been the primary issue in processor design, with various power reduction strategies being adopted from system-level to circuitlevel. In order to develop a po...
Chan-Hao Chang, Diana Marculescu
DSP
2007
13 years 7 months ago
Performance comparison between statistical-based and direct data domain STAPs
In the situation that a radar platform is moving very fast, the number of training data used in space-time adaptive processing (STAP) is a major concern. Less number of training d...
Santana Burintramart, Tapan K. Sarkar, Yu Zhang, M...
DFT
2006
IEEE
143views VLSI» more  DFT 2006»
14 years 1 months ago
Defect Tolerant and Energy Economized DSP Plane of a 3-D Heterogeneous SoC
This paper1 discusses a defect tolerant and energy economized computing array for the DSP plane of a 3-D Heterogeneous System on a Chip. We present the J-platform, which employs c...
Vijay K. Jain, Glenn H. Chapman
CASES
2006
ACM
13 years 11 months ago
Reaching fast code faster: using modeling for efficient software thread integration on a VLIW DSP
When integrating software threads together to boost performance on a processor with instruction-level parallel processing support, it is rarely clear which code regions should be ...
Won So, Alexander G. Dean
APCCAS
2006
IEEE
245views Hardware» more  APCCAS 2006»
14 years 1 months ago
Digital Audio Broadcasting System Modeling and Hardware Implementation
— DAB is a growing communication technology for digital audio broadcasting and demands higher concentration on flexible and cost optimum implementations for use in new mobile ele...
Nariman Moezzi Madani, Hamed Holisaz, Seid Mehdi F...