334 search results - page 17 / 67 » eXtended Block Cache |
TVCG
2010
13 years 2 months ago
2010
Abstract--One important bottleneck when visualizing large data sets is the data transfer between processor and memory. Cacheaware (CA) and cache-oblivious (CO) algorithms take into...
MICRO
2010
IEEE
13 years 5 months ago
2010
IEEE
Efficient management of last level caches (LLCs) plays an important role in bridging the performance gap between processor cores and main memory. This paper is motivated by two key...
CASES
2010
ACM
13 years 5 months ago
2010
ACM
The performance of most embedded systems is critically dependent on the memory hierarchy performance. In particular, higher cache hit rate can provide significant performance boos...
EUROPAR
1999
Springer
13 years 11 months ago
1999
Springer
Processor cycle time continues to decrease faster than main memory access times, placing higher demands on cache memory hierarchy performance. To meet these demands, conventional ...
ICIP
2000
IEEE
14 years 9 months ago
2000
IEEE
This paper describes a low-memory cache efficient Hybrid Block Coder (HBC) for images in which an image subband decomposition is partitioned into a combination of spatial blocks a...