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FCCM
2007
IEEE
108views VLSI» more  FCCM 2007»
14 years 1 months ago
Configurable Transactional Memory
Programming efficiency of heterogeneous concurrent systems is limited by the use of lock-based synchronization mechanisms. Transactional memories can greatly improve the programmi...
Christoforos Kachris, Chidamber Kulkarni
FCCM
2007
IEEE
111views VLSI» more  FCCM 2007»
14 years 1 months ago
A Structural Object Programming Model, Architecture, Chip and Tools for Reconfigurable Computing
A new platform for reconfigurable computing has an object-based programming model, with architecture, silicon and tools designed to faithfully realize this model. The platform is ...
Michael Butts, Anthony Mark Jones, Paul Wasson
FCCM
2007
IEEE
129views VLSI» more  FCCM 2007»
14 years 1 months ago
Automatic On-chip Memory Minimization for Data Reuse
FPGA-based computing engines have become a promising option for the implementation of computationally intensive applications due to high flexibility and parallelism. However, one...
Qiang Liu, George A. Constantinides, Konstantinos ...
FCCM
2007
IEEE
115views VLSI» more  FCCM 2007»
14 years 1 months ago
Generating FPGA-Accelerated DFT Libraries
We present a domain-specific approach to generate highperformance hardware-software partitioned implementations of the discrete Fourier transform (DFT) in fixed point precision....
Paolo D'Alberto, Peter A. Milder, Aliaksei Sandryh...
FCCM
2007
IEEE
107views VLSI» more  FCCM 2007»
14 years 1 months ago
Optimizing Logarithmic Arithmetic on FPGAs
This paper proposes optimizations of the methods and parameters used in both mathematical approximation and hardware design for logarithmic number system (LNS) arithmetic. First, ...
Haohuan Fu, Oskar Mencer, Wayne Luk