This paper will describe the architecture of a compiler which will convert an untimed C description of a set of floating point expressions into a synthesizable datapath optimized ...
—We present a parameterized stereo vision core suitable for a wide range of FPGA targets and stereo vision applications. By enabling easy tuning of algorithm parameters, our syst...
Modern use of FPGAs as hardware accelerators involves the partial reconfiguration of hardware resources as the application executes. In this paper, we present a polynomial time al...