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FPL
2009
Springer
104views Hardware» more  FPL 2009»
14 years 3 days ago
A multi-layered XML schema and design tool for reusing and integrating FPGA IP
Reconfigurable computing systems remain difficult to use and program. One way to increase design productivity for these systems is through reuse of previously developed and veri...
Adam Arnesen, Nathan Rollins, Michael J. Wirthlin
FCCM
2009
IEEE
147views VLSI» more  FCCM 2009»
13 years 11 months ago
FPGA Accelerated Simulation of Biologically Plausible Spiking Neural Networks
Artificial neural networks are a key tool for researchers attempting to understand and replicate the behaviour and intelligence found in biological neural networks. Software simul...
David Thomas, Wayne Luk
SIGMOD
2009
ACM
157views Database» more  SIGMOD 2009»
14 years 7 months ago
FPGA: what's in it for a database?
While there seems to be a general agreement that next years' systems will include many processing cores, it is often overlooked that these systems will also include an increa...
Jens Teubner, René Müller
FPGA
2009
ACM
188views FPGA» more  FPGA 2009»
14 years 2 months ago
Clock power reduction for virtex-5 FPGAs
Clock network power in field-programmable gate arrays (FPGAs) is considered and two complementary approaches for clock power reduction in the Xilinx R VirtexTM -5 FPGA are presen...
Qiang Wang, Subodh Gupta, Jason Helge Anderson
FPGA
2009
ACM
159views FPGA» more  FPGA 2009»
14 years 2 months ago
Choose-your-own-adventure routing: lightweight load-time defect avoidance
Aggressive scaling increases the number of devices we can integrate per square millimeter but makes it increasingly difficult to guarantee that each device fabricated has the inte...
Raphael Rubin, André DeHon