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FPL
2000
Springer
116views Hardware» more  FPL 2000»
14 years 3 days ago
FPGA Implementation of a Prototype WDM On-Line Scheduler
Message sequencing and channel assignment are two important aspects to consider in optimizing the performance of Wavelength Division Multiplexing (WDM) networks. A scheduling techn...
Winnie W. Cheng, Steven J. E. Wilton, Babak Hamidz...
FPL
2000
Springer
130views Hardware» more  FPL 2000»
14 years 3 days ago
Area-Optimized Technology Mapping for Hybrid FPGAs
As integration levels in FPGA devices have increased over the past decade, the structure of programmable logic resources has become more diversified. Recently, Altera Corporation h...
Srini Krishnamoorthy, Sriram Swaminathan, Russell ...
FPL
2000
Springer
124views Hardware» more  FPL 2000»
14 years 3 days ago
Balancing Logic Utilization and Area Efficiency in FPGAs
Abstract. In this paper we outline a procedure to determine appropriate partitioning of programmable logic and interconnect area to minimize overall device area across a broad rang...
Russell Tessier, Heather Giza
FPL
2000
Springer
77views Hardware» more  FPL 2000»
14 years 3 days ago
Multiple-Wordlength Resource Binding
This paper describes a novel resource binding technique for use in multiple-wordlength systems implemented in FPGAs. It is demonstrated that the multiple-wordlength binding problem...
George A. Constantinides, Peter Y. K. Cheung, Wayn...
FPL
2000
Springer
125views Hardware» more  FPL 2000»
14 years 3 days ago
Multiplexer Based Reconfiguration for Virtex Multipliers
A novel approach, based on a radix-4 Booth encoding, is presented for constant coefficient multipliers. The major advantage of this approach is that it reduces the amount of reconf...
Tim Courtney, Richard H. Turner, Roger Woods