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GLVLSI
1999
IEEE

62views VLSI» more GLVLSI 1999»

A Multiple-Input Single-Phase Clock Flip-Flop Family

15 years 10 months ago

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Richard F. Hobson, Allan R. Dyck

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GLVLSI
1999
IEEE

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Symbolic Multi-Level Verification of Refinement

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Stefan Hendricx, Luc J. M. Claesen

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112

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GLVLSI
1999
IEEE

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Formal Verification of Tree-Structured Carry-Lookahead Adders

15 years 10 months ago

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Sae Hwan Kim, Shiu-Kai Chin

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104

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GLVLSI
1999
IEEE

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A Novel High-Speed Flip-Flop Circuit Using RTDs and HEMTs

15 years 10 months ago

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Hideaki Matsuzaki, Toshihiro Itoh, Masafumi Yamamo...

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126

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GLVLSI
1999
IEEE

85views VLSI» more GLVLSI 1999»

Reducing BDD Size by Exploiting Structural Connectivity

15 years 10 months ago

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