Given a set of placed blocks, we present an algorithm that minimally spaces the blocks to ensure routability under several assumptions. By performing a binary search on total widt...
This paper reviews the modeling of subthreshold leakage current and proposes an improved model for general series-parallel CMOS networks. The presence of on-switches in off-networ...
Application-specific instruction set processor (ASIP) has become an important design choice for embedded systems. It can achieve both high flexibility offered by the base processo...
A PAL-based logic block is the core of great majority of contemporary CPLD devices. The purpose of the paper is to present a new approach to multi-level synthesis for PAL-based CP...
Compact realizations of reversible logic functions are of interest in the design of quantum computers. Such reversible functions are realized as a cascade of Toffoli gates. In th...