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ICCAD
1995
IEEE
136views Hardware» more  ICCAD 1995»
13 years 11 months ago
A controller-based design-for-testability technique for controller-data path circuits
This paper investigates the effect of the controller on the testability of sequential circuits composed of controllers and data paths. It is shown that even when both the controll...
Sujit Dey, Vijay Gangaram, Miodrag Potkonjak
ICCAD
1995
IEEE
95views Hardware» more  ICCAD 1995»
13 years 11 months ago
A sequential quadratic programming approach to concurrent gate and wire sizing
With an ever-increasing portion of the delay in highspeed CMOS chips attributable to the interconnect, interconnect-circuit design automation continues to grow in importance. By t...
Noel Menezes, Ross Baldick, Lawrence T. Pileggi
ICCAD
1995
IEEE
106views Hardware» more  ICCAD 1995»
13 years 11 months ago
Re-engineering of timing constrained placements for regular architectures
In a typical design ow, the design may be altered slightly several times after the initial design cycle according to minor changes in the design speci cation either as a result o...
Anmol Mathur, K. C. Chen, C. L. Liu
ICCAD
1995
IEEE
114views Hardware» more  ICCAD 1995»
13 years 11 months ago
Sequential synthesis using S1S
Abstract—We propose the use of the logic S1S as a mathematical framework for studying the synthesis of sequential designs. We will show that this leads to simple and mathematical...
Adnan Aziz, Felice Balarin, Robert K. Brayton, Alb...
ICCAD
1995
IEEE
140views Hardware» more  ICCAD 1995»
13 years 11 months ago
Bounded-skew clock and Steiner routing under Elmore delay
: We study the minimum-cost bounded-skew routing tree problem under the Elmore delay model. We presenttwo approachesto construct bounded-skew routing trees: (i) the Boundary Mergin...
Jason Cong, Andrew B. Kahng, Cheng-Kok Koh, Chung-...