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ICCD
2000
IEEE
120views Hardware» more  ICCD 2000»
14 years 12 hour ago
Equivalence Checking Combining a Structural SAT-Solver, BDDs, and Simulation
This paper presents a verification technique for functional comparison of large combinational circuits using a novel combination of known approaches. The idea is based on a tight...
Viresh Paruthi, Andreas Kuehlmann
ICCD
2000
IEEE
75views Hardware» more  ICCD 2000»
14 years 4 months ago
Hybridizing and Coalescing Load Value Predictors
Most well-performing load value predictors are hybrids that combine multiple predictors into one. Such hybrids are often large. To reduce their size and to improve their performan...
Martin Burtscher, Benjamin G. Zorn
ICCD
2000
IEEE
125views Hardware» more  ICCD 2000»
14 years 4 months ago
Architectural Support for Dynamic Memory Management
Recent advances in software engineering, such as graphical user intevaces and object-oriented programming, have caused applications to become more memory intensive. These applicat...
J. Morris Chang, Witawas Srisa-an, Chia-Tien Dan L...
ICCD
2000
IEEE
94views Hardware» more  ICCD 2000»
14 years 4 months ago
A Selective Temporal and Aggressive Spatial Cache System Based on Time Interval
This research proposes a new cache system that can increase the effect by temporal and spatial locality by using only simple hardware control without any locality detection hardwa...
Jung-Hoon Lee, Jang-Soo Lee, Shin-Dug Kim
ICCD
2000
IEEE
99views Hardware» more  ICCD 2000»
14 years 4 months ago
Self-Calibrating Clocks for Globally Asynchronous Locally Synchronous Systems
We present a local clocking mechanism based on a tunable delay line which calibrates itself from a low frequency global clock. After initial tuning, the local clock remains calibr...
Simon W. Moore, George S. Taylor, Paul A. Cunningh...