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ICCD
2002
IEEE
160views Hardware» more  ICCD 2002»
14 years 7 months ago
Modeling Switching Activity Using Cascaded Bayesian Networks for Correlated Input Streams
We represent switching activity in VLSI circuits using a graphical probabilistic model based on Cascaded Bayesian Networks (CBN’s). We develop an elegant method for maintaining ...
Sanjukta Bhanja, N. Ranganathan
ICCD
2002
IEEE
101views Hardware» more  ICCD 2002»
14 years 7 months ago
Improving the Efficiency of Circuit-to-BDD Conversion by Gate and Input Ordering
Boolean functions are fundamental to synthesis and verification of digital logic, and compact representations of Boolean functions have great practical significance. Popular repre...
Fadi A. Aloul, Igor L. Markov, Karem A. Sakallah
ICCD
2002
IEEE
140views Hardware» more  ICCD 2002»
14 years 7 months ago
Fitted Elmore Delay: A Simple and Accurate Interconnect Delay Model
— In this paper, we present a new interconnect delay model called Fitted Elmore delay (FED). FED is generated by approximating Hspice delay data using a curve fitting technique....
Arif Ishaq Abou-Seido, Brian Nowak, Chris C. N. Ch...
ICCD
2002
IEEE
110views Hardware» more  ICCD 2002»
14 years 7 months ago
Branch Predictor Prediction: A Power-Aware Branch Predictor for High-Performance Processors
We introduce Branch Predictor Prediction (BPP) as a power-aware branch prediction technique for high performance processors. Our predictor reduces branch prediction power dissipat...
Amirali Baniasadi, Andreas Moshovos
ICCD
2002
IEEE
88views Hardware» more  ICCD 2002»
14 years 7 months ago
Improving Processor Performance by Simplifying and Bypassing Trivial Computations
During the course of a program’s execution, a processor performs many trivial computations; that is, computations that can be simplified or where the result is zero, one, or equ...
Joshua J. Yi, David J. Lilja