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ICCAD
2006
IEEE
108views Hardware» more  ICCAD 2006»
14 years 6 months ago
Soft error reduction in combinational logic using gate resizing and flipflop selection
Soft errors in logic are emerging as a significant reliability problem for VLSI designs. This paper presents novel circuit optimization techniques to mitigate soft error rates (SE...
Rajeev R. Rao, David Blaauw, Dennis Sylvester
ICCAD
2006
IEEE
119views Hardware» more  ICCAD 2006»
14 years 6 months ago
FastRoute: a step to integrate global routing into placement
Because of the increasing dominance of interconnect issues in advanced IC technology, placement has become a critical step in the IC design flow. To get accurate interconnect inf...
Min Pan, Chris C. N. Chu
CHI
2010
ACM
14 years 4 months ago
Model-driven development of advanced user interfaces
This paper reports on the 2nd Workshop on Model Driven Development of Advanced User Interfaces (MDDAUI’06) held on October 2nd, 2006 at the MoDELS’06 conference in Genova, Ital...
Jan Van den Bergh, Gerrit Meixner, Kai Breiner, An...
SC
2009
ACM
14 years 4 months ago
Scalable temporal order analysis for large scale debugging
We present a scalable temporal order analysis technique that supports debugging of large scale applications by classifying MPI tasks based on their logical program execution order...
Dong H. Ahn, Bronis R. de Supinski, Ignacio Laguna...
CTRSA
2009
Springer
95views Cryptology» more  CTRSA 2009»
14 years 4 months ago
Statistically Hiding Sets
Zero-knowledge set is a primitive introduced by Micali, Rabin, and Kilian (FOCS 2003) which enables a prover to commit a set to a verifier, without revealing even the size of the...
Manoj Prabhakaran, Rui Xue
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