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ICCAD
2006
IEEE
123views Hardware» more  ICCAD 2006»
14 years 4 months ago
A revisit to floorplan optimization by Lagrangian relaxation
With the advent of deep sub-micron (DSM) era, floorplanning has become increasingly important in physical design process. In this paper we clarify a misunderstanding in using Lag...
Chuan Lin, Hai Zhou, Chris C. N. Chu
ICCAD
2006
IEEE
131views Hardware» more  ICCAD 2006»
14 years 4 months ago
High-level synthesis challenges and solutions for a dynamically reconfigurable processor
A dynamically reconfigurable processor (DRP) is designed to achieve high area efficiency by switching reconfigurable data paths dynamically. Our DRP architecture has a stand alone...
Takao Toi, Noritsugu Nakamura, Yoshinosuke Kato, T...
CGO
2008
IEEE
14 years 2 months ago
Latency-tolerant software pipelining in a production compiler
In this paper we investigate the benefit of scheduling non-critical loads for a higher latency during software pipelining. "Noncritical" denotes those loads that have s...
Sebastian Winkel, Rakesh Krishnaiyer, Robyn Sampso...
ACSAC
2006
IEEE
14 years 1 months ago
Back to the Future: A Framework for Automatic Malware Removal and System Repair
Malware is software with malicious intent. Besides viruses and worms, spyware, adware, and other newer forms of malware have recently emerged as widely-spread threats to system se...
Francis Hsu, Hao Chen, Thomas Ristenpart, Jason Li...
ACSC
2006
IEEE
14 years 1 months ago
Human visual perception of region warping distortions
Interactive virtual reality requires at least 60 frames per second in order to ensure smooth motion. For a good immersive experience, it is also necessary to have low end-to-end l...
Yang-Wai Chow, Ronald Pose, Matthew Regan, James P...