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ISCA
2002
IEEE
68views Hardware» more  ISCA 2002»
15 years 8 months ago
Timekeeping in the Memory System: Predicting and Optimizing Memory Behavior
Techniques for analyzing and improving memory referencing behavior continue to be important for achieving good overall program performance due to the ever-increasing performance g...
Zhigang Hu, Margaret Martonosi, Stefanos Kaxiras
ISCA
2002
IEEE
105views Hardware» more  ISCA 2002»
15 years 8 months ago
Power and Performance Evaluation of Globally Asynchronous Locally Synchronous Processors
Due to shrinking technologies and increasing design sizes, it is becoming more difficult and expensive to distribute a global clock signal with low skew throughout a processor di...
Anoop Iyer, Diana Marculescu
ISCA
2002
IEEE
159views Hardware» more  ISCA 2002»
15 years 8 months ago
Avoiding Initialization Misses to the Heap
This paper investigates a class of main memory accesses (invalid memory traffic) that can be eliminated altogether. Invalid memory traffic is real data traffic that transfers inva...
Jarrod A. Lewis, Mikko H. Lipasti, Bryan Black
ISCA
2002
IEEE
95views Hardware» more  ISCA 2002»
15 years 8 months ago
Design Tradeoffs for the Alpha EV8 Conditional Branch Predictor
This paper presents the Alpha EV8 conditional branch predictor. The Alpha EV8 microprocessor project, canceled in June 2001 in a late phase of development, envisioned an aggressiv...
André Seznec, Stephen Felix, Venkata Krishn...
ISCA
2002
IEEE
93views Hardware» more  ISCA 2002»
15 years 8 months ago
Transient-Fault Recovery Using Simultaneous Multithreading
We propose a scheme for transient-fault recovery called Simultaneously and Redundantly Threaded processors with Recovery (SRTR) that enhances a previously proposed scheme for tran...
T. N. Vijaykumar, Irith Pomeranz, Karl Cheng
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