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ISCA
2012
IEEE
234views Hardware» more  ISCA 2012»
12 years 23 days ago
PARDIS: A programmable memory controller for the DDRx interfacing standards
Modern memory controllers employ sophisticated address mapping, command scheduling, and power management optimizations to alleviate the adverse effects of DRAM timing and resource...
Mahdi Nazm Bojnordi, Engin Ipek
ISCA
2012
IEEE
280views Hardware» more  ISCA 2012»
12 years 23 days ago
A case for random shortcut topologies for HPC interconnects
—As the scales of parallel applications and platforms increase the negative impact of communication latencies on performance becomes large. Fortunately, modern High Performance C...
Michihiro Koibuchi, Hiroki Matsutani, Hideharu Ama...
ISCA
2012
IEEE
248views Hardware» more  ISCA 2012»
12 years 23 days ago
Watchdog: Hardware for safe and secure manual memory management and full memory safety
Languages such as C and C++ use unsafe manual memory management, allowing simple bugs (i.e., accesses to an object after deallocation) to become the root cause of exploitable secu...
Santosh Nagarakatte, Milo M. K. Martin, Steve Zdan...
ISCA
2012
IEEE
242views Hardware» more  ISCA 2012»
12 years 23 days ago
Side-channel vulnerability factor: A metric for measuring information leakage
There have been many attacks that exploit side-effects of program execution to expose secret information and many proposed countermeasures to protect against these attacks. Howeve...
John Demme, Robert Martin, Adam Waksman, Simha Set...
TVCG
2012
216views Hardware» more  TVCG 2012»
12 years 23 days ago
AniPaint: Interactive Painterly Animation from Video
—This paper presents an interactive system for creating painterly animation from video sequences. Previous approaches to painterly animation typically emphasize either purely aut...
Peter O'Donovan, Aaron Hertzmann