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ISVLSI
2005
IEEE
115views VLSI» more  ISVLSI 2005»
14 years 3 months ago
High Speed Max-Log-MAP Turbo SISO Decoder Implementation Using Branch Metric Normalization
The authors present a turbo soft-in soft-out (SISO) decoder based on Max-Log maximum a posteriori (ML-MAP) algorithm implemented with sliding window (SW) method. A novel technique...
J. H. Han, Ahmet T. Erdogan, Tughrul Arslan
ISVLSI
2005
IEEE
108views VLSI» more  ISVLSI 2005»
14 years 3 months ago
Analysis of a Mask-Based Nanowire Decoder
A key challenge facing nanotechnologies will be controlling nanoarrays, two orthogonal sets of nanowires that form a crossbar, using a moderate number of mesoscale wires. Three me...
Eric Rachlin, John E. Savage, Benjamin Gojman
ISVLSI
2005
IEEE
157views VLSI» more  ISVLSI 2005»
14 years 3 months ago
Configurable Multiprocessors for High-Performance MPEG-4 Video Coding
We investigate the performance improvement of a multithreaded MPEG-4 video encoder executing on a configurable, extensible, SoC multiprocessor. Architecture-level results indicate...
Vassilios A. Chouliaras, Tom R. Jacobs, Ashwin K. ...
ISVLSI
2005
IEEE
129views VLSI» more  ISVLSI 2005»
14 years 3 months ago
Reduction of Direct Tunneling Power Dissipation during Behavioral Synthesis of Nanometer CMOS Circuits
— Direct tunneling current is the major component of static power dissipation of a CMOS circuit for technology below 65nm, where the gate dielectric (SiO2) is very low. We intuit...
Saraju P. Mohanty, Ramakrishna Velagapudi, Valmiki...
ISVLSI
2005
IEEE
101views VLSI» more  ISVLSI 2005»
14 years 3 months ago
eWatch: Context Sensitive System Design Case Study
In this paper, we introduce a novel context sensitive system design paradigm. Multiple sensors/ computational architecture, in the form of our eWatch device, is used to infer the ...
Asim Smailagic, Daniel P. Siewiorek, Uwe Maurer, A...