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ITC
1999
IEEE
78views Hardware» more  ITC 1999»
14 years 2 months ago
Minimized power consumption for scan-based BIST
Power consumption of digital systems may increase significantly during testing. In this paper, systems equipped with a scan-based built-in self-test like the STUMPS architecture a...
Stefan Gerstendörfer, Hans-Joachim Wunderlich
ITC
1999
IEEE
89views Hardware» more  ITC 1999»
14 years 2 months ago
Defect detection using power supply transient signal analysis
Transient Signal Analysis is a digital device testing method that is based on the analysis of voltage transients at multiple test points. The power supply transient signals of an ...
Amy Germida, Zheng Yan, James F. Plusquellic, Fide...
ITC
1999
IEEE
118views Hardware» more  ITC 1999»
14 years 2 months ago
Logic BIST for large industrial designs: real issues and case studies
This paper discusses practical issues involved in applying logic built-in self-test (BIST) to four large industrial designs. These multi-clock designs, ranging in size from 200K t...
Graham Hetherington, Tony Fryars, Nagesh Tamarapal...
ITC
1999
IEEE
107views Hardware» more  ITC 1999»
14 years 2 months ago
A high-level BIST synthesis method based on a region-wise heuristic for an integer linear programming
A high-level built-in self-test (BIST) synthesis involves several tasks such as system register assignment, interconnection assignment, and BIST register assignment. Existing high...
Han Bin Kim, Dong Sam Ha
ITC
1999
IEEE
98views Hardware» more  ITC 1999»
14 years 2 months ago
A design diversity metric and reliability analysis for redundant systems
Design diversity has long been used to protect redundant systems against common-mode failures. The conventional notion of diversity relies on "independent" generation of...
Subhasish Mitra, Nirmal R. Saxena, Edward J. McClu...