In this paper we present the geometrical construction of an approximate generalized Voronoi diagram for generalized polygons and circular objects based on their minimum geometrica...
We present the design of a high performance on-chip pipelined asynchronous DRAM suitable for use in a microprocessor cache. Although traditional DRAM structures suffer from long a...
A structurally testable delay fault might become untestable in the functional mode of the circuit due to logic or timing constraints or both. Experimental data suggests that there...
In this paper fully connected RTRL neural networks are studied. In order to learn dynamical behaviours of linear-processes or to predict time series, an autonomous learning algori...
Driver’s fatigue/distraction is one of the most common causes of traffic accidents. The aim of this paper is to develop a real time system to detect anomalous situations while ...
Fernando De la Torre, Carlos Javier Garcia Rubio, ...