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TVLSI
2008
124views more  TVLSI 2008»
13 years 8 months ago
A Refinement-Based Compositional Reasoning Framework for Pipelined Machine Verification
Abstract--We present a refinement-based compositional framework for showing that pipelined machines satisfy the same safety and liveness properties as their non-pipelined specifica...
Panagiotis Manolios, Sudarshan K. Srinivasan
TVLSI
2008
120views more  TVLSI 2008»
13 years 8 months ago
An Interactive Design Environment for C-Based High-Level Synthesis of RTL Processors
Much effort in register transfer level (RTL) design has been devoted to developing "push-button" types of tools. However, given the highly complex nature, and lack of con...
Dongwan Shin, Andreas Gerstlauer, Rainer Döme...
TVLSI
2008
144views more  TVLSI 2008»
13 years 8 months ago
Reconfigurable Hardware for High-Security/ High-Performance Embedded Systems: The SAFES Perspective
Abstract--Embedded systems present significant security challenges due to their limited resources and power constraints. This paper focuses on the issues of building secure embedde...
Guy Gogniat, Tilman Wolf, Wayne P. Burleson, Jean-...
TVLSI
2008
78views more  TVLSI 2008»
13 years 8 months ago
Minimal-Power, Delay-Balanced Smart Repeaters for Global Interconnects in the Nanometer Regime
Abstract--A SMART repeater is proposed for driving capacitively-coupled, global-length on-chip interconnects that alters its drive strength dynamically to match the relative bit pa...
Roshan Weerasekera, Dinesh Pamunuwa, Li-Rong Zheng...
TVLSI
2008
111views more  TVLSI 2008»
13 years 8 months ago
GlitchLess: Dynamic Power Minimization in FPGAs Through Edge Alignment and Glitch Filtering
This paper describes Glitchless, a circuit-level technique for reducing power in FPGAs by eliminating unnecessary logic transitions called glitches. This is done by adding program...
Julien Lamoureux, Guy G. Lemieux, Steven J. E. Wil...