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    ISCAS
    2005
    IEEE
    108views Hardware» more  ISCAS 2005»
    On VLSI decompositions for d-ary de Bruijn graphs (extended abstract)
    15 years 9 months ago
    On VLSI decompositions for d-ary de Bruijn graphs (extended abstract)
    Download  www.lab.ss.titech.ac.jp
    Toshinori Yamada, Hiroyuki Kawakita, Tadashi Nishi...
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    92
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    IWSOC
    2005
    IEEE
    114views Hardware» more  IWSOC 2005»
    Global Lower Bounds for the VLSI Macrocell Floorplanning Problem Using Semidefinite Optimization
    15 years 9 months ago
    Global Lower Bounds for the VLSI Macrocell Floorplanning Problem Using Semidefinite Optimization
    Download  orion.math.uwaterloo.ca
    P. L. Takouda, Miguel F. Anjos, Anthony Vannelli
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    96
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    VLSID
    2005
    IEEE
    108views VLSI» more  VLSID 2005»
    Design of a Low Power Image Watermarking Encoder Using Dual Voltage and Frequency
    16 years 4 months ago
    Design of a Low Power Image Watermarking Encoder Using Dual Voltage and Frequency
    Download  www.cse.unt.edu
    Saraju P. Mohanty, N. Ranganathan, K. Balakrishnan
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    88
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    FCCM
    2005
    IEEE
    81views VLSI» more  FCCM 2005»
    Performance and Cost Analysis of Time-Multiplexed Execution on the Dynamically Reconfigurable Processor
    15 years 9 months ago
    Performance and Cost Analysis of Time-Multiplexed Execution on the Dynamically Reconfigurable Processor
    Download  csdl2.computer.org
    Hideharu Amano, Shohei Abe, Yohei Hasegawa, Katsua...
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    120
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    FCCM
    2005
    IEEE
    155views VLSI» more  FCCM 2005»
    An Open TCP/IP Core for Reconfigurable Logic
    15 years 9 months ago
    An Open TCP/IP Core for Reconfigurable Logic
    Download  www.ics.forth.gr
    Apostolos Dollas, Ioannis Ermis, Iosif Koidis, Ioa...
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