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240
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vlsi 2005
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ISCAS
2005
IEEE
108
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ISCAS 2005
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On VLSI decompositions for d-ary de Bruijn graphs (extended abstract)
14 years 1 months ago
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www.lab.ss.titech.ac.jp
Toshinori Yamada, Hiroyuki Kawakita, Tadashi Nishi...
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21
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IWSOC
2005
IEEE
114
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Global Lower Bounds for the VLSI Macrocell Floorplanning Problem Using Semidefinite Optimization
14 years 1 months ago
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orion.math.uwaterloo.ca
P. L. Takouda, Miguel F. Anjos, Anthony Vannelli
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18
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VLSID
2005
IEEE
108
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VLSI
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VLSID 2005
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Design of a Low Power Image Watermarking Encoder Using Dual Voltage and Frequency
14 years 8 months ago
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www.cse.unt.edu
Saraju P. Mohanty, N. Ranganathan, K. Balakrishnan
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16
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FCCM
2005
IEEE
81
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VLSI
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FCCM 2005
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Performance and Cost Analysis of Time-Multiplexed Execution on the Dynamically Reconfigurable Processor
14 years 1 months ago
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csdl2.computer.org
Hideharu Amano, Shohei Abe, Yohei Hasegawa, Katsua...
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FCCM
2005
IEEE
155
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VLSI
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FCCM 2005
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An Open TCP/IP Core for Reconfigurable Logic
14 years 1 months ago
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www.ics.forth.gr
Apostolos Dollas, Ioannis Ermis, Iosif Koidis, Ioa...
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