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    ISCAS
    2005
    IEEE
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    A RAM-based FPGA implementation of the 64-bit MISTY1 block cipher
    14 years 5 months ago
    A RAM-based FPGA implementation of the 64-bit MISTY1 block cipher
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    —A high-throughput hardware architecture and FPGA implementation of the 64-bit NESSIE proposal, MISTY1 block cipher, is presented in this paper. This architecture, in contrast to...
    Paris Kitsos, Michalis D. Galanis, Odysseas G. Kou...
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