HPCA
1997
IEEE
13 years 12 months ago
1997
IEEE
This paper represents a design study of the datapath for a very long instruction word (VLIW) video signal processor (VSP). VLIW architectures provide high parallelism and excellen...
HPCA
1997
IEEE
13 years 12 months ago
1997
IEEE
Fast Ethernet and ATM are two attractive network technologies for interconnecting workstation clusters for parallel and distributed computing. This paper compares network interfac...
HPCA
1997
IEEE
13 years 12 months ago
1997
IEEE
Many parallel systems offer a simple view of memory: all storage cells are addresseduniformly. Despite a uniform view of the memory, the machines differsignificantly in theirmemo...
HPCA
1997
IEEE
13 years 12 months ago
1997
IEEE
Processors with write-through caches typically require a write buffer to hide the write latency to the next level of memory hierarchy and to reduce write traffic. A write buffer ...
HPCA
1997
IEEE
13 years 12 months ago
1997
IEEE
This paper compares the performance of hierarchical ring- and mesh-connected wormhole routed shared memory multiprocessor networks in a simulation study. Hierarchical rings are in...
HPCA
1997
IEEE
13 years 12 months ago
1997
IEEE
In this paper we explore software-managed address translation. The purpose of the study is to specify the memory management design for a high clock-rate PowerPC implementation in ...
HPCA
1997
IEEE
13 years 12 months ago
1997
IEEE
HPCA
1997
IEEE
13 years 12 months ago
1997
IEEE
This paper introduces a new architectural approach that supports compiler-synthesized dynamic branch predication. In compiler-synthesized dynamic branch prediction, the compiler g...
HPCA
1997
IEEE
13 years 12 months ago
1997
IEEE
JSSPP
1998
Springer
13 years 12 months ago
1998
Springer