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ICPP
2003
IEEE
14 years 1 months ago
Performance of a Heterogeneous Grid Partitioner for N-body Applications
An important characteristic of distributed grids is that they allow geographically separated multicomputers to be tied together in a transparent virtual environment to solve large...
Daniel J. Harvey, Sajal K. Das, Rupak Biswas
ICPP
2003
IEEE
14 years 1 months ago
Performance and Power Impact of Issue-width in Chip-Multiprocessor Cores
In chip-multiprocessors (CMPs), the number of cores and the issue width of each core presents an important design trade-off to balance the amount of TLP and ILP between multi-thre...
Magnus Ekman, Per Stenström
ICPP
2003
IEEE
14 years 1 months ago
FastLSA: A Fast, Linear-Space, Parallel and Sequential Algorithm for Sequence Alignment
Pairwise sequence alignment is a fundamental operation for homology search in bioinformatics. For two DNA or protein sequences of length ¢ and £ , full-matrix (FM), dynamic prog...
Adrian Driga, Paul Lu, Jonathan Schaeffer, Duane S...
ICPP
2003
IEEE
14 years 1 months ago
Running Bag-of-Tasks Applications on Computational Grids: The MyGrid Approach
e some simple working environment abstractions that hide the configuration heterogeneity of the machines that compose the grid from the user. Second, we introduce Work Queue with R...
Walfredo Cirne, Daniel Paranhos da Silva, Lauro Co...
ICPP
2003
IEEE
14 years 1 months ago
Accurately Modeling Workload Interactions for Deploying Prefetching in Web Servers
Although Web prefetching is regarded as an effective method to improve client access performance, the associated overhead prevents it from being widely deployed. Specifically, a ...
Xin Chen, Xiaodong Zhang
ICPP
2003
IEEE
14 years 1 months ago
Implementation of Strong Mobility for Multi-Threaded Agents in Java
Strong mobility, which allows an external thread to transparently migrate an agent at any time, is difficult to implement in Java since the Java Virtual Machine does not allow se...
Arjav J. Chakravarti, Xiaojin Wang, Jason O. Halls...
ICPP
2003
IEEE
14 years 1 months ago
Scheduling Algorithms with Bus Bandwidth Considerations for SMPs
The bus that connects processors to memory is known to be a major architectural bottleneck in SMPs. However, both software and scheduling policies for these systems generally focu...
Christos D. Antonopoulos, Dimitrios S. Nikolopoulo...