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ICFP
1996
ACM
13 years 12 months ago
A Theory of Weak Bisimulation for Core CML
Concurrent ML (CML) is an extension of Standard ML of New Jersey with concurrent features similar to those of process algebra. In this paper, we build upon John Reppy's reduc...
William Ferreira, Matthew Hennessy, Alan Jeffrey
IFIP
1997
Springer
13 years 12 months ago
Realizing quality of service guarantees in multiservice networks
This paper is motivated by the concern of the multiservice network provider who wishes to offer users quality of service guarantees concerning transparency, accessibility and thro...
James W. Roberts
IFIP
1997
Springer
13 years 12 months ago
Measurement-based CAC for video applications using SBR service
This paper provides a conservative estimation of the required bandwidth for video sources multiplexed according to the bu erless scheme and using the Statistical Bit Rate transfer...
F. Brichet, Alan Simonian
IFIP
1997
Springer
13 years 12 months ago
A simulation model for designing the automation of future's factory
The factory of the future is going to have a high, but not full, degree of automation. There are three reasons for that. First, no great level of automation is compatible with req...
Javier Borda Elejabarrieta
IFIP
1997
Springer
13 years 12 months ago
Representing a body of knowledge for teaching, learning and assessment
: National and international standards for professional groups may become a dominant and governing force as internet-based professional training becomes universally accepted. Educa...
Don Sheridan, David White
ASPLOS
1996
ACM
13 years 12 months ago
Shasta: A Low Overhead, Software-Only Approach for Supporting Fine-Grain Shared Memory
This paper describes Shasta, a system that supports a shared address space in software on clusters of computers with physically distributed memory. A unique aspect of Shasta compa...
Daniel J. Scales, Kourosh Gharachorloo, Chandramoh...
ASPLOS
1996
ACM
13 years 12 months ago
The Case for a Single-Chip Multiprocessor
Advances in IC processing allow for more microprocessor design options. The increasing gate density and cost of wires in advanced integrated circuit technologies require that we l...
Kunle Olukotun, Basem A. Nayfeh, Lance Hammond, Ke...
ASPLOS
1996
ACM
13 years 12 months ago
Exploiting Dual Data-Memory Banks in Digital Signal Processors
Over the past decade, digital signal processors (DSPs) have emerged as the processors of choice for implementing embedded applications in high-volume consumer products. Through th...
Mazen A. R. Saghir, Paul Chow, Corinna G. Lee
ASPLOS
1996
ACM
13 years 12 months ago
A Quantitative Analysis of Loop Nest Locality
This paper analyzes and quantifies the locality characteristics of numerical loop nests in order to suggest future directions for architecture and software cache optimizations. Si...
Kathryn S. McKinley, Olivier Temam