CGO
2004
IEEE
13 years 11 months ago
2004
IEEE
Operand gating is a technique for improving processor energy efficiency by gating off sections of the data path that are unneeded by short-precision (narrow) operands. A method fo...
CGO
2004
IEEE
13 years 11 months ago
2004
IEEE
In this paper, we describe a generalized approach to deriving a custom data layout in multiple memory banks for array-based computations, to facilitate high-bandwidth parallel mem...
CGO
2004
IEEE
13 years 11 months ago
2004
IEEE
Predicated execution enables the removal of branches by converting segments of branching code into sequences of conditional operations. An important side effect of this transforma...
CGO
2004
IEEE
13 years 11 months ago
2004
IEEE
Traditionally, software pipelining is applied either to the innermost loop of a given loop nest or from the innermost loop to outer loops. In this paper, we propose a threestep ap...
CGO
2004
IEEE
13 years 11 months ago
2004
IEEE
Traditionally, software pipelining is applied either to the innermost loop of a given loop nest or from the innermost loop to the outer loops. In a companion paper, we proposed a ...
CGO
2004
IEEE
13 years 11 months ago
2004
IEEE
Static Single Assignment form is an intermediate representation that uses instructions to merge values at each confluent point of the control flow graph. instructions are not ma...
CGO
2004
IEEE
13 years 11 months ago
2004
IEEE
The effective use of processor caches is crucial to the performance of applications. It has been shown that cache misses are not evenly distributed throughout a program. In applic...
CGO
2004
IEEE
13 years 11 months ago
2004
IEEE
We study several major characteristics of dynamic optimization within the PARROT power-aware, trace-cachebased microarchitectural framework. We investigate the benefit of providin...
CGO
2004
IEEE
13 years 11 months ago
2004
IEEE
64-bit processor architectures like the Intel
APSEC
2006
IEEE
13 years 11 months ago
2006
IEEE