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    EURODAC
    1994
    IEEE
    209views VHDL» more  EURODAC 1994»
    MOS VLSI circuit simulation by hardware accelerator using semi-natural models
    14 years 4 months ago
    MOS VLSI circuit simulation by hardware accelerator using semi-natural models
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    - The accelerator is destined to circuit-level simulation of digital and analog/digital MOS VLSI'c containing of up to 100 thousand transistors (with 16 Mb RAM host-machine). ...
    Victor V. Denisenko
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