Sciweavers

    DAC
    2005
    ACM
    127views Computer Architecture» more  DAC 2005»
    Total power reduction in CMOS circuits via gate sizing and multiple threshold voltages
    14 years 2 months ago
    Total power reduction in CMOS circuits via gate sizing and multiple threshold voltages
    Download  www.cecs.uci.edu
    Minimizing power consumption is one of the most important objectives in IC design. Resizing gates and assigning different Vt’s are common ways to meet power and timing budgets. ...
    Feng Gao, John P. Hayes
    claim paper
    Read More »
    Explore & Download
    Proceedings Preprints Top 5 Ranked Papers Publications Books Software Tutorials Presentations Lectures Notes Datasets
    Productivity Tools
    International On-screen Keyboard Graphical Social Symbols OCR Text Recognition CSS3 Style Generator Web Page to PDF Web Page to Image PDF Split PDF Merge Latex Equation Editor Sci2ools
    Document Tools
    PDF to Text PDF to Postscript PDF to Thumbnails Excel to PDF Word to PDF Postscript to PDF PowerPoint to PDF Latex to Word Repair Corrupted PDF
    Image Tools
    JPG to PS JPG to PDF Extract Images from PDF Image Converter
    Sciweavers
    About Community Cookies Privacy Policy Terms of Use

    Copyright © Sciweavers LLC, 2009-2024, USA.