Sciweavers

TVLSI
2008
126views more  TVLSI 2008»
13 years 11 months ago
Body Bias Voltage Computations for Process and Temperature Compensation
With continued scaling into the sub-90nm regime, the role of process, voltage and temperature (PVT) variations on the performance of VLSI circuits has become extremely important. T...
Sanjay V. Kumar, Chris H. Kim, Sachin S. Sapatneka...
ICCAD
2006
IEEE
127views Hardware» more  ICCAD 2006»
14 years 8 months ago
Joint design-time and post-silicon minimization of parametric yield loss using adjustable robust optimization
Parametric yield loss due to variability can be effectively reduced by both design-time optimization strategies and by adjusting circuit parameters to the realizations of variable...
Murari Mani, Ashish Kumar Singh, Michael Orshansky