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CAL
2007
14 years 8 days ago
CIM: A Reliable Metric for Evaluating Program Phase Classifications
Sreekumar V. Kodakara, Jinpyo Kim, David J. Lilja,...
CAL
2007
14 years 13 days ago
Chameleon: A High Performance Flash/FRAM Hybrid Solid State Disk Architecture
—Flash memory solid state disk (SSD) is gaining popularity and replacing hard disk drive (HDD) in mobile computing systems such as ultra mobile PCs (UMPCs) and notebook PCs becau...
Jinhyuk Yoon, Eyee Hyun Nam, Yoon Jae Seong, Hongs...
CAL
2007
14 years 13 days ago
Nahalal: Cache Organization for Chip Multiprocessors
— This paper addresses cache organization in Chip Multiprocessors (CMPs). We show that in CMP systems it is valuable to distinguish between shared data, which is accessed by mult...
Zvika Guz, Idit Keidar, Avinoam Kolodny, Uri C. We...
CAL
2007
14 years 13 days ago
Branch Misprediction Prediction: Complementary Branch Predictors
1 – In this paper, we propose a new class of branch predictors, complementary branch predictors, which can be easily added to any branch predictor to improve the overall predicti...
Resit Sendag, Joshua J. Yi, Peng-fei Chuang
CAL
2007
14 years 13 days ago
Explaining Dynamic Cache Partitioning Speed Ups
Abstract— Cache Partitioning has been proposed as an interesting alternative to traditional eviction policies of shared cache levels in modern CMP architectures: throughput is im...
Miquel Moretó, Francisco J. Cazorla, Alex R...
CAL
2007
14 years 13 days ago
Logic-Based Distributed Routing for NoCs
—The design of scalable and reliable interconnection networks for multicore chips (NoCs) introduces new design constraints like power consumption, area, and ultra low latencies. ...
José Flich, José Duato
CAL
2007
14 years 13 days ago
Probabilistic Prediction of Temporal Locality
—The increasing gap between processor and memory
Yoav Etsion, Dror G. Feitelson
CAL
2007
14 years 13 days ago
Dynamic Predication of Indirect Jumps
Abstract—Indirect jumps are used to implement increasinglycommon programming language constructs such as virtual function calls, switch-case statements, jump tables, and interfac...
José A. Joao, Onur Mutlu, Hyesoon Kim, Yale...
CAL
2007
14 years 13 days ago
A Building Block for Coarse-Grain Optimizations in the On-Chip Memory Hierarchy
Current on-chip block-centric memory hierarchies exploit access patterns at the fine-grain scale of small blocks. Several recently proposed memory hierarchy enhancements for coher...
Jason Zebchuk, Andreas Moshovos
CAL
2007
14 years 13 days ago
Low-Cost Microarchitectural Support for Improved Floating-Point Accuracy
Abstract—Some processors designed for consumer applications, such as Graphics Processing Units (GPUs) and the CELL processor, promise outstanding floating-point performance for ...
William R. Dieter, A. Kaveti, Henry G. Dietz