CAL
2010
14 years 6 months ago
2010
131
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CAL
2010
14 years 6 months ago
2010
Memory models like SC, TSO, and PC enforce load-load ordering, requiring that loads from any single thread appear to occur in program order to all other threads. Out-of-order execu...
141
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CAL
2010
14 years 7 months ago
2010
This paper describes dynamic pressure-aware associative placement (DPAP), a novel distributed cache management scheme for large-scale chip multiprocessors. Our work is motivated by...
107
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CAL
2010
14 years 7 months ago
2010
Address translation often emerges as a critical performance bottleneck for virtualized systems and has recently been the impetus for hardware paging mechanisms. These mechanisms ap...
CAL
2010
14 years 7 months ago
2010
CAL
2010
14 years 7 months ago
2010