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Cell libraries often contain a simulation model in a system design language, such as Verilog. These languages usually involve nondeterminism, which in turn, poses a challenge to th...
Matthias Raffelsieper, Mohammad Reza Mousavi, Jan-...
We present a formal semantics for a subset of Verilog, commonly used to describe cell libraries, in terms of transition systems. Such transition systems can serve as input to symb...