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    WCE
    2007
    130views Electrical And Computer Engi...» more  WCE 2007»
    Circuit Noise Interference on Sampling Clock and Its Effect on A/D Conversion
    14 years 22 days ago
    Circuit Noise Interference on Sampling Clock and Its Effect on A/D Conversion
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    —Clock jitter and its effects on signal-to-noise ratio (SNR) were widely investigated in the published literatures. However, most of the issues mainly focused on white-Gaussian-n...
    Sun Lei, An Jianping, Wu Yanbo
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    DAC
    2005
    ACM
    103views Computer Architecture» more  DAC 2005»
    Simulation of the effects of timing jitter in track-and-hold and sample-and-hold circuits
    14 years 1 months ago
    Simulation of the effects of timing jitter in track-and-hold and sample-and-hold circuits
    Download  www.cs.york.ac.uk
    In this paper, we analyze the effect of jitter in track and hold circuits. The output spectrum is obtained in terms of the system function of the track and hold. It is a fairly g...
    V. Vasudevan
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