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ISQED
2003
IEEE
303views Hardware» more  ISQED 2003»
14 years 4 months ago
Design and Analysis of Low-Voltage Current-Mode Logic Buffers
- This paper investigates important problems involved in the design of a CML buffer as well as a chain of tapered CML buffers. A new design procedure to systematically design a cha...
Payam Heydari
GLVLSI
2003
IEEE
229views VLSI» more  GLVLSI 2003»
14 years 4 months ago
Design issues in low-voltage high-speed current-mode logic buffers
- A current-mode logic (CML) buffer is based on a simple differential circuit. This paper investigates important problems involved in the design of a CML buffer as well as a chain ...
Payam Heydari