Sciweavers

DFT
1994
IEEE
157views VLSI» more  DFT 1994»
13 years 11 months ago
An Approach to the Development of a IDDQ Testable Cell Library
C. Ferrer, D. Dateo, J. Oliver, Antonio Rubio, M. ...
DFT
1994
IEEE
121views VLSI» more  DFT 1994»
13 years 11 months ago
Reconfiguration in 3D Meshes
The 1: track model for fault tolerant 2 0 processor arrays is extended to 30 mesh architectures. Non-intersecting, continuous, straight and non-near miss compensation paths are co...
Anuj Chandra, Rami G. Melhem