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CW
2006
IEEE
14 years 5 months ago
A New Method for Developing Business Applications: The Cellular Data System
Currently, in the development of business applications, difficulties occasionally arise between the customer side and the supplier side, causing delays and higher development cost...
Toshio Kodama, Tosiyasu L. Kunii, Yoichi Seki
CW
2006
IEEE
14 years 5 months ago
An Interactive Mixed Reality Framework for Virtual Humans
In this paper, we present a simple and robust Mixed Reality (MR) framework that allows for real-time interaction with Virtual Humans in real and virtual environments under consist...
Arjan Egges, George Papagiannakis, Nadia Magnenat-...
CW
2006
IEEE
14 years 5 months ago
Standardized Virtual Reality, Are We There Yet?
Despite its history of several decades and impressive achievements, developing a VR application is still a complex task. Setting-up a Virtual Environment requires choosing a suita...
Mario A. Gutierrez A., Frédéric Vexo...
ASAP
2006
IEEE
145views Hardware» more  ASAP 2006»
14 years 5 months ago
2D-VLIW: An Architecture Based on the Geometry of Computation
This work proposes a new architecture and execution model called 2D-VLIW. This architecture adopts an execution model based on large pieces of computation running over a matrix of...
Ricardo Santos, Rodolfo Azevedo, Guido Araujo
ASAP
2006
IEEE
97views Hardware» more  ASAP 2006»
14 years 5 months ago
Dynamic-SIMD for lens distortion compensation
An increasing computational demand is placed on the image processing capacity of current and future smart cameras. SIMD processor architectures provide an efficient solution becau...
Bart Mesman, Hamed Fatemi, Henk Corporaal, Twan Ba...
ASAP
2006
IEEE
147views Hardware» more  ASAP 2006»
14 years 5 months ago
The Molen FemtoJava Engine
This paper presents the Molen FemtoJava engine that is extended with concepts taken from the Molen polymorphic processor. This allows for the existing FemtoJava to be augmented wi...
Júlio C. B. de Mattos, Stephan Wong, Luigi ...
ASAP
2006
IEEE
106views Hardware» more  ASAP 2006»
14 years 5 months ago
Throughput Optimized SHA-1 Architecture Using Unfolding Transformation
In this paper, we analyze the theoretical delay bound of the SHA-1 algorithm and propose architectures to achieve high throughput hardware implementations which approach this boun...
Yong Ki Lee, Herwin Chan, Ingrid Verbauwhede
ASAP
2006
IEEE
130views Hardware» more  ASAP 2006»
14 years 5 months ago
Cross Layer Design to Multi-thread a Data-Pipelining Application on a Multi-processor on Chip
Data-Pipelining is a widely used model to represent streaming applications. Incremental decomposition and optimization of a data-pipelining application onto a multi-processor plat...
Bo-Cheng Charles Lai, Patrick Schaumont, Wei Qin, ...