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46
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MICRO
1995
IEEE
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MICRO 1995
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Improving instruction-level parallelism by loop unrolling and dynamic memory disambiguation
14 years 4 months ago
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www.cs.virginia.edu
Exploitation ofinstruction-levelparallelism is an ejfective mechanism for improving the performance of modern super-scalar/VLIW processors. Various software techniques can be appl...
Jack W. Davidson, Sanjay Jinturkar
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